Overview of digital logic design; Simplification of switching functions; K-map
based reduction of switching functions; Combinational logic design;
Complex combinational logic modules such as multiplexers/
demultiplexers, decoders, PLAs and their use in standardized
combinational logic design; Memory elements and time delay concepts,
Flip-flops, latches, registers; Sequential circuit concepts and state
diagrams; Cloc- kmode sequential circuits analysis and design; Synthesis
of state diagrams; Fundamental-mode sequential circuits; Analysis and
design, hazards, races and cycles. Logic element realization; Ideal switch
based implementation; Logic families; FET switches; MOS switch based logic realization; nMOS and CMOS logic -Pass transistor logic;
Algorithmic optimization of combinational logic; VLSI realization of
combinational logic. Language based description of complex digital
systems; RTL descriptions and design language representation; Levels of
description; Behavioral and structural descriptions; VHDL / verilog
representation languages; Timing analysis and simulation, levels of
simulation; Synthesis of descriptions. VLSI realization of digital systems;
Programmable logic devices and programmable gate arrays. Test
generation for VLSI; Fault detection and fault models; Test generation
strategy; Fault simulation in sequential systems; Observability,
controllability and scan paths; Boundary scan; Built-in self-test.
Digital VLSI design using CAD tools.
- Teacher: kama KAMAKOTI V
- Teacher: Gargi Mitra